Portable electronic products such as mobile phones, mobile computing, and various consumer products require higher semiconductor functionality and performance in a limited footprint and minimal thickness and weight at the lowest cost. This has driven the industry to increase integration on the individual semiconductor chips.
In order to increase the functional density in integrated circuit devices, companies have begun implementing integration on the “z-axis,” that is, by stacking chips, and stacks of up to five chips in one package have been used. This provides a dense chip structure having the footprint of a one-chip package, in the range of 25 square mm to 1600 square mm, and obtaining thicknesses that have been continuously decreasing from 2.3 mm to 0.5 mm. The cost of a stacked die package is only incrementally higher than the cost of a single die package and the assembly yields are high enough to assure a competitive final cost as compared to packaging the die in individual packages.
The primary practical limitation to the number of chips that can be stacked in a stacked die package is the low final test yield of the stacked-die package. It is inevitable that some of the die in the package will be defective to some extent, and therefore the final package test yield will be the product of the individual die test yields, each of which is always less than 100%. This can be particularly a problem even if only two die are stacked in a package but one of them has low yield because of design complexity or technology.
Another limitation is the power dissipation of the package. The heat is transmitted from one die to the other and there is no significant dissipation path other than through the solder ball to the motherboard. The increased heat in the package can significantly reduce the life of the chips in the package. This is a significant problem whether several die are stacked in a single package or several packages are stacked in a single structure. Stacked packages can provide numerous advantages as compared to stacked-die packages. For instance, each package with its die can be electrically tested, and rejected unless it shows satisfactory performance, before the packages are stacked. As a result the final stacked multi-package module yields can be maximized.
A further limitation is electromagnetic interference between the stacked die, particularly between RF and digital die, because there is no electrical shielding of either die. This issue becomes significant in small consumer electronic devices, such as cell phones or global positioning systems.
More efficient cooling can be provided in stacked packages, by inserting a heat spreader between the packages in the stack as well as at the top of the module. These additional components in the manufacturing stack add another level of complexity to the package assembly process and may reduce the manufacturing yield somewhat.
Thus, a need still remains for a package-on-package system with heat spreader that can increase the package reliability by removing excess heat without adding burdensome manufacturing processes. In view of the increasing demand for Internet connected devices and cell phones, it is increasingly critical that answers be found to these problems. In view of the ever-increasing commercial competitive pressures, along with growing consumer expectations and the diminishing opportunities for meaningful product differentiation in the marketplace, it is critical that answers be found for these problems. Additionally, the need to save costs, improve efficiencies and performance, and meet competitive pressures, adds an even greater urgency to the critical necessity for finding answers to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.